The input pins to an integrated circuit device are highly sensitive to damage from electrostatic discharge (ESD). An electrostatic charge may reach potentials in excess of hundreds of volts. If a charge of this magnitude is brought into contact with a pin of an integrated circuit (IC) device, a large flow of current may surge through the device. Although this current surge may be of limited energy and duration, it may nonetheless rupture the thin gate oxide in an MOS device or damage a diffused PN junction if the junction is of limited area. In the latter case, the damage occurs because the current surge leads to localized heating which may melt metal interconnects or alloy metal through the junction. Once an IC is damaged, it is impossible to repair it.
In conventional integrated circuits, damaging ESD pulses are prevented by the use of protective circuitry at the input to the device. This protective circuitry is typically constructed of one or two PN diodes of substantial area or, alternatively, a bipolar transistor or thyristor. When the voltage at the input exceeds a specified range in either a positive or negative polarity, one of the diodes conducts and thereby clamps the voltage at the pin to a safe level. The effectiveness of the ESD protection requires that the diode not be exposed to substantial currents during the application of normal input signals to the IC device.
FIG. 1A illustrates an equivalent circuit for a common ESD protection arrangement. The input terminal of the circuit is connected to an input pin, and the output terminal is connected to the internal circuitry of the IC device. A diode D.sub.A has its anode connected to ground and its cathode connected to a line 10 connecting the input and output terminals. A diode D.sub.B has its anode connected to line 10 and its cathode connected to the supply voltage V.sub.CC.
The operation of this circuit is illustrated in FIG. 1B, wherein V.sub.IN is the voltage at the input terminal and V.sub.OUT is the voltage at the output terminal. If V.sub.IN exceeds the supply voltage V.sub.CC plus a diode drop (approximately 0.7 V), diode D.sub.B becomes forward-biased and clamps V.sub.OUT to this level. This is illustrated by curve A in FIG. 1A. This assumes that the device is operative, with the supply voltage V.sub.CC connected. If V.sub.CC is not connected, at some point diode D.sub.A will break down and thereby clamp the voltage at the output terminal. This is represented by curve B in FIG. 1B, with BV.sub.DA representing the breakdown voltage of diode D.sub.A.
A negative voltage spike at the input terminal will cause diode D.sub.A to forward-bias when it falls below approximately 0.7 volts. This is shown by curve C in FIG. 1B. If the negative spike occurs between a pin connected to V.sub.CC and the input pin, diode D.sub.B will become reverse-biased and break down at its breakdown voltage BV.sub.DB, as illustrated by curve D in FIG. 1B.
The net result is that, provided V.sub.CC is maintained at a positive voltage above ground (typically 5 or 12 V), an input voltage can pass through the ESD protection circuit unimpaired. In FIG. 1B this is reflected by the linear relationship between V.sub.IN and V.sub.OUT over a range from 0 V to V.sub.CC. In this region the only effect of the protective circuitry may be to create some capacitive loading.
During an ESD pulse, rapid heating occurs in the diode. If the area of the diode is too small, a significant and potentially fatal temperature rise may occur. Destruction through heating generally occurs as a result of melting the metalization or the formation of alloy spikes which short out the diode's junction. By increasing the size of the diode, a peak junction temperature of 200.degree. C. can easily be reduced to 90.degree. C. for a 2000 V ESD pulse.
An ESD pulse may be modeled as a discharge of a capacitor precharged to a given voltage. The discharge occurs through a resistance whose value varies with the particular situation which the model is intended to represent. For example, if the discharge occurs from a human body, the resistance is approximately 2000 ohms. If the electrostatic charge is built up in a machine or tool (e.g., a screw driver), the resistance is essentially zero. In the absence of any series resistance, in the machine model the magnitude of the discharge must be kept below about 500 V or excessive current will result. While this current may be limited by an internal series resistor, all IC processes implement resistors as either a diffusion or as a region surrounded by oxide. Diffused resistors in general include parasitic transistors which may compromise the ESD diode performance. Resistors surrounded by oxides such as those made in polysilicon have the problem of overheating during electrostatic discharge, since the oxide surrounding them has poor thermal conductivity. In fact, a resistor will generally blow out, like a fuse, and protect an ESD diode.
The maximum output voltage of an ESD circuit must remain below the allowable voltage of the input stage of the circuit to which it is connected. If the input stage is tied to the base of a bipolar transistor, for example, V.sub.OUT must be clamped below the base-to-emitter breakdown voltage, or the transistor may break down, and its performance may be degraded. If the input stage is connected to the gate of a MOSFET, V.sub.OUT should stay below 50% of the oxide rupture voltage (around 4 MV/cm). For a 400 .ANG. thick gate, for example, the voltage V.sub.OUT should be clamped to approximately 16 V. Beyond this voltage some degradation may be observed. If the voltage across the gate oxide exceeds 8 to 10 MV/cm, the MOSFET will be permanently damaged.
The foregoing techniques rely on the ability of the diodes to absorb the energy of an ESD pulse. The diodes clamp the voltage to a safe level and do not burn out only because the total energy in the ESD pulse is limited. For pulses of longer durations, approaching a DC condition, overheating and damage will generally result. The higher the input voltage, the more rapidly the diodes will overheat and self-destruct. Thus, while conventional ESD protective circuits are able to withstand ESD pulses of thousands of volts, the duration of the pulse must be very short (measured in nanoseconds), or the diodes in the protective circuitry will burn out.
In some environments an IC device may be subjected to an over-voltage condition for a longer period of time. This is particularly true in an automobile, where a condition known as "load dump" can occur. Load dump occurs when the alternator is charging a discharged battery which has a loose cable. So long as the cable is connected, the battery appears as a short circuit to the alternator, and the alternator delivers a large current. If the automobile hits a bump, for example, and jars the cable loose, this large current is suddenly cut off (i.e., there is a high dI/dt). This abrupt change in current creates a large burst of voltage from the alternator as a result of inductance. The magnitude and duration of this voltage burst are high enough that every electronic load connected directly to the battery cable will be destroyed unless some special protection is employed. The voltage burst from a load dump may rise to 60 V for hundreds of milliseconds.
The supply input to an IC must be able to survive the voltage transients which accompany a load dump. Moreover, even some of the signal inputs to the IC may be connected, directly or indirectly, to the battery line, and these inputs may likewise be subjected to the load dump condition.
A comparison between a normal ESD spike and a load dump is illustrated in FIGS. 2A-2C. The horizontal axis on each of these figures is time. As shown in FIG. 2A, an ESD pulse is very short lived but may reach a magnitude of thousands of volts. On the other hand, a load dump may reach a magnitude of, for example, 60 V but is relatively long in duration. FIG. 2B illustrates the result of clamping an ESD pulse and a load dump to 15 V with an ordinary diode. FIG. 2C illustrates the temperature of the diode. As shown, the ESD pulse results in a sharp temperature increase to as high as 200.degree. C., but the short duration of the pulse prevents the temperature from destroying the diode. In contrast, the load dump causes the temperature to increase over a much longer period of time and will ultimately destroy the diode.
The load dump condition thus places unique requirements on the ESD protection circuitry. If the diodes are fabricated such that they do not conduct during the load dump (e.g., 60 V), they will not provide adequate protection during electrostatic discharge (since they will allow the voltage in the IC to rise to 60 V). On the other hand, if the diodes are made to break down at 15 V, thereby protecting the IC against ESD, they will burn out during a load dump.
Accordingly, what is needed is an ESD structure which will clamp the voltage on an input pin to some low voltage (e.g., 5 to 15 V) during a short ESD pulse, but will not result in excess current during the application of, say, 60 V for extended periods of time. Such a structure would be useful as a load dump-compatible ESD protection circuit for integrated circuits used in automotive environments.